When a load-from-memory operation (referred to as a “load micro-operation” or “load uop” in certain processor nomenclatures) is dispatched for execution in a pipelined processor, it typically checks against older, in-flight, store-to-memory operations (“store uops”) in a store buffer of the processor. This check is performed because there may be older store uops in the store buffer with a matching memory address to the load uop that have not yet written their data into a memory hierarchy that is accessed by the processing device. If there is such a matching store, the load uop either, in general, forwards from the youngest older matching store uop or waits until the store uop is completed. This address checking process against older store uops for possible dependency is commonly referred to as memory disambiguation.